FPGAs 101: Everything You Need to Know to Get

FPGAs (Field-Programmable Gate Arrays) can be found in applications such as smart phones, mp3 players, medical imaging devices, and for aerospace and defense technology. FPGAs consist of logic blocks and programmable interconnects. This allows an engineer to start with a blank slate and program the FPGA for a specific task, for instance, digital signal processing, or a specific device, for example, a software-defined radio. Due to the short time to market and ability to reprogram to fix bugs without having to respin FPGAs are in increasingly high demand. This book is for the engineer that has not yet had any experience with this electrifying and growing field. The complex issue of FPGA design is broken down into four distinct phases - Design / Synthesis / Simulation / Place & Route. Numerous step-by-step examples along with source code accompany the discussion. A brief primer of one of the popular FPGA and hardware languages, VHDL, is incorporated for a simple yet comprehensive learning tool. While a general technology background is assumed, no direct hardware development understanding is needed. Also, included are details on tool-set up, verifaction techniques, and test benches. Reference material consists of a quick reference guide, reserved words, and common VHDL/FPGA terms. *For beginners - it starts by answer the question: What Is an FPGA? *Breaks down the complex design and development of FPGAs into easy-to-learn building blocks *Step-by-step instructions, illustrations and numerous examples fill the pages

About the Author	p. ix
Acknowledgments	p. xi
About this Book	p. xiii
Acronyms	p. xv
Getting Started	p. 1
Introduction	p. 1
VHDL	p. 1
Reserved Words	p. 2
Tips for Writing Good Code	p. 3
Tip 1. Use Comments to Convey Information about the Code	p. 3
Tip 2. Indent for Clarity and Readability	p. 4
Tip 3. Use Standard Format Convention	p. 4
Tip 4. Include a Header Section	p. 4
Tip 5. Use Brief Descriptive Names	p. 5
HDL Text Editors	p. 6
Standalone Text Editor	p. 6
Fee-Based Text Editor	p. 7
Editor Features	p. 7
Syntax Color Highlighting	p. 7
Language Templates	p. 8
Row and Column Editor	p. 8
Comment/Uncomment Selected Text	p. 9
Indent/Unindent Selected Text	p. 11
Predefined Font Convention	p. 11
Signals	p. 12
Signal Data Types	p. 12
Signal Names	p. 14
File Structure	p. 14
Optional Header Section	p. 14
Library Declaration	p. 14
Entity Section	p. 16
Architecture Section	p. 17
Starter Tips	p. 19
Chapter Overview	p. 20
Simple Designs	p. 21
Introduction	p. 21
Starter Template	p. 21
Mathematical Functions	p. 22
Logic Gate	p. 25
D Flip-Flop	p. 26
Latch	p. 29
Shift Register	p. 30
Comparator	p. 32
Binary Counter	p. 33
Conversion Functions	p. 35
Read File	p. 37
Write File	p. 40
Chapter Overview	p. 42
FPGA Development Phases	p. 43
Introduction	p. 43
What Is a Field Programmable Gate Array?	p. 43
I/O Interfaces	p. 44
Basic Logic Building Blocks	p. 45
Ability to Interconnect	p. 50
Programmable Logic Device Options	p. 51
FPGA Development Phases	p. 53
Chapter Overview	p. 54
Design	p. 57
Introduction	p. 57
What Is the Design Phase?	p. 57
Design Package	p. 58
Evaluating the Design Package	p. 59
Package Analysis	p. 60
Getting Clarification	p. 60
Organization	p. 61
Predesign Decisions	p. 62
Design Format	p. 63
FPGA Manufacturer	p. 65
Development Tools	p. 66
Creating Design Options	p. 67
Automatic Code Generators	p. 67
Manual Code Generation	p. 68
Design Package	p. 68
Chapter Overview	p. 81
Simulation	p. 83
Introduction	p. 83
What Is Simulation?	p. 84
Simulation Tools	p. 85
Levels of Simulation	p. 86
Test Cases	p. 87
Stimulus	p. 89
Interactive Stimulus	p. 89
Graphical Test Bench	p. 90
HDL Testbench	p. 92
Manual Testbench	p. 95
Simulation Phase Outputs	p. 100
Automatic Testbench	p. 102
Capture Data	p. 105
Simulation Tutorial	p. 117
Chapter Overview	p. 125
Synthesis	p. 127
Introduction	p. 127
What Is Design Synthesis?	p. 128
Design Check and Resource Association	p. 130
Optimization	p. 130
Technology Mapping	p. 131
Synthesis Phase Tools	p. 131
Vendors and Features	p. 132
Synthesis Tool Setup	p. 135
Synthesis Input	p. 136
Synthesis Output Files	p. 137
Netlists	p. 138
Status Reports	p. 139
Schematic Views	p. 139
Technology Schematic View	p. 139
Synthesis Tutorial	p. 140
Chapter Overview	p. 158
Implementation	p. 161
Introduction	p. 161
What Is Implementation?	p. 161
Translate	p. 162
Map	p. 163
Place and Route	p. 163
Generate Program File	p. 164
Implementation Tools	p. 165
implementation Inputs	p. 165
Implementation Outputs	p. 166
Implementation Tutorial	p. 167
Chapter Overview	p. 189
Programming	p. 191
Introduction	p. 191
What Is Programming?	p. 191
Tools and Hardware	p. 191
Joint Test Advisory Group	p. 193
In-System Programming	p. 194
Third Party Programmers	p. 194
Hardware Configuration	p. 196
Programming Tutorial	p. 198
Chapter Overview	p. 202
References and Sources	p. 205
Web Sites	p. 205
Data I/O	p. 206
Appendix: Testbenches	p. 207
Adder and Subtracter Testbench	p. 207
Logic Gates Testbench	p. 209
D Flip-Flop Testbench	p. 210
DFF with Synchronous Enable Testbench	p. 212
Latch Design Testbench	p. 214
Manual Shift Register Testbench	p. 216
Comparator Testbench	p. 218
Binary Counter Testbench	p. 220
Binary Counter with Synchronous Enable Testbench	p. 221
Conversion Testbench	p. 223
Index	p. 225
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FPGAs 101: Everything You Need to Know to Get Started

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