CMOS Voltage References An Analytical and

A practical overview of CMOS circuit design, this book covers the technology, analysis, and design techniques of voltage reference circuits. The design requirements covered follow modern CMOS processes, with an emphasis on low power, low voltage, and low temperature coefficient voltage reference design. Dedicating a chapter to each stage of the design process, the authors have organised the content to give readers the tools they need to implement the technologies themselves. Readers will gain an understanding of device characteristics, the practical considerations behind circuit topology, and potential problems with each type of circuit. Many design examples are used throughout, most of which have been tested with silicon implementation or employed in real-world products. This ensures that the material presented relevant to both students studying the topic as well as readers requiring a practical viewpoint.

Chi-Wah Kok, Canaan Microelectronics Corporation Limited, China
Chi-Wah Kok obtained his degree from the University of Wisconsin Madison. Since 1992, he has been working with various semi-conductor companies, research institutions and universities, which include AT&T Labs Research, Holmdel, SONY U.S. Research Labs, Stanford University, Hong Kong University of Science and Technology, Hong Kong Polytechnic University, City University of Hong Kong, and Lattice Semiconductor. In 2006, he founded Canaan Microelectronics Corp Ltd., a fabless IC company with products in mixed signal IC for consumer electronics. He has extensively applied signal processing techniques to improve the circuit topologies, designs, and fabrication technologies within Canaan. This includes the application of semidefinite programming to circuit design optimization, abstract algebra in switched capacitor circuit topologies improvement, and nonlinear optimization methods to optimize high voltage MOSFET layout and fabrication.

Wing-Shan Tam, Canaan Microelectronics Corp Limited, China
Wing-Shan Tam received her BEng degree in electronic engineering from The Chinese University of Hong Kong, and MSc degree in electronic and information engineering from The Hong Kong Polytechnic University, and PhD degree in electronic engineering from the City University of Hong Kong in 2004, 2007, and 2010, respectively. Currently, she is the Engineering Manager of Canaan Microelectronics Corp Ltd., and she has been working with CMOS circuit design since 2004. Her research interests include mixed-signal integrated circuit design for data conversion and power-management.

About the Authors ix

Preface xi

Acknowledgements xiii

Nomenclature xv

1 Warm Up 1

1.1 Bipolar Junction Transistors 2

1.1.1 Differential VBE 5

1.2 Metal-Oxide Semiconductor Field-Effect Transistor 7

1.2.1 Cutoff Region 11

1.2.2 Subthreshold Conduction 11

1.2.3 Triode Region 14

1.2.4 Saturation Region 16

1.2.5 Thermal Properties 19

1.2.6 Channel Length Modulation Effect 23

1.3 Diode 23

1.4 Resistor 25

1.4.1 Dummy Element 27

1.4.2 Guard Ring 27

1.4.3 Sheet Resistance 27

1.5 Device Matching 28

1.5.1 Application of Statistics to Circuit Design 28

1.5.2 Systematic Variation 30

1.6 Simulation Models for Circuit Design 31

1.6.1 Process Variation and Typical Design 32

1.6.2 Process Corners 34

1.7 Noise 36

1.7.1 Types of Noises 36

1.7.2 Sums and Multiplications of Noises 38

1.8 Fabrication Technology 39

1.9 Book Organization 40

1.10 Exercises 42

References 46

2 Voltage Reference 49

2.1 Performance Measures 49

2.1.1 Line Regulation 51

2.1.2 Temperature Coefficient 54

2.1.3 Power Supply Rejection Ratio 56

2.1.4 Quiescent Current 59

2.1.5 Output Noise 60

2.2 Other Design Considerations 62

2.3 Summary 63

2.4 Exercises 65

References 70

3 Bandgap Voltage Reference 71

3.1 Widlar Bandgap Voltage Reference Circuit 71

3.2 Drain Voltage Equalization Current Mirror 74

3.2.1 Opamp Based

β-Multiplier Bandgap Voltage Reference Circuit 76

3.2.2 Bandgap Voltage Reference Circuit 77

3.3 Major Circuit Elements 81

3.3.1 Operational Amplifier 81

3.3.2 Current Mirror 86

3.3.3 Startup Circuit 88

3.3.4 Resistor Network 93

3.3.5 Bipolar Transistor 94

3.4 Complete Layout 95

3.5 Summary 95

3.6 Exercises 96

References 101

4 Error Sources in Bandgap Voltage Reference Circuit 103

4.1 Non-Ideal Opamp 103

4.1.1 Input Offset Voltage 104

4.1.2 Limited Gain and Power Supply Rejection Ratio 112

4.1.3 Noise 113

4.2 Current Mirror Mismatch 114

4.2.1 Channel Length Modulation Effect Compensation 116

4.2.2 Cascode Current Mirror 117

4.3 Bipolar Transistor 122

4.3.1 Size Variation 122

4.3.2 Series Base Resistance 122

4.3.3 β Variation 125

4.4 Resistor Variation 126

4.5 Power Supply Variation 127

4.5.1 Pre-Regulation 132

4.6 Output Loading 135

4.7 Output Noise 138

4.8 Voltage Reference Circuit Trimming 140

4.8.1 Linked Fuse Resistor Trimming 141

4.8.2 Resistor Trimming Circuit Analysis 142

4.8.3 Modulated Trimming 146

4.8.4 Voltage Domain Trimming 148

4.8.5 Current Domain Trimming 149

4.9 Summary 149

4.10 Exercises 151

References 161

ADVANCED VOLTAGE REFERENCE CIRCUITS

5 Temperature Compensation Techniques 165

5.1 VBE − DeltaVBE Compensation 166

5.1.1 Brokaw Bandgap Voltage Reference 168

5.1.2 β-Multiplier VBE − DeltaVBE Compensation 170

5.2 Widlar PTAT Current Source and VBE Compensation 175

5.3 VGS Based Temperature Compensation 177

5.3.1 VGS Current Source 178

5.4 Summary 182

5.5 Exercises 183

References 189

6 Sub-1V Voltage Reference Circuit 191

6.1 Sub-1V Output Stage 193

6.2 Voltage Headroom in Opamp based β-multiplier Voltage Reference Circuit 195

6.2.1 Opamp with NMOS Input Stage 197

6.2.2 Local Voltage Boosting 198

6.2.3 Low Vth Transistor 198

6.2.4 Bulk-Driven Transistors 199

6.3 Sub-1V Bandgap Voltage Reference by Resistive Division 199

6.3.1 Resistive Divided VBE 202

6.3.2 Independent Biased Resistive Divided VBE 206

6.4 Peaking Current Source and VBE Compensation 209

6.5 Weighted DeltaVGS Compensation 211

6.6 Summary 214

6.7 Exercises 215

References 222

7 High Order Curvature Correction 223

7.1 Compensation Order 224

7.2 Second Order Temperature Compensation 228

7.2.1 Second Order Current Source 229

7.2.2 Current Subtraction 232

7.2.3 Current Addition 236

7.3 BJT Current Subtraction 238

7.4 Piecewise Linear Compensation 240

7.5 Sum and Difference of Sources with Similar Temperature Dependence 243

7.5.1 Difference of Voltages with Similar Temperature Dependence 244

7.5.2 Sum of Voltages with Inverted Temperature Dependence 245

7.5.3 Multi-threshold Voltages Curvature Compensated Voltage Reference 247

7.6 Summary 252

7.7 Exercises 253

References 257

8 CMOS Voltage Reference without Resistors 259

8.1 Generation of Weighted PTAT Source By Inverse Functions 260

8.1.1 Weighted Differential Circuit 260

8.1.2 Negative Impedance Converter 262

8.2 Resistorless Voltage and Current Sources 265

8.2.1 Resistorless Voltage Source 265

8.2.2 Resistorless Current Source 266

8.3 First Order Compensated Resistorless Bandgap Voltage Reference Circuit 268

8.3.1 Voltage Summation Based Resistorless Reference Circuit 269

8.3.2 Current Summation Based Resistorless Reference Circuit 270

8.4 Resistorless Sub-Bandgap Reference Circuit 270

8.4.1 The Voltage Summation Approach 271

8.4.2 CTAT Voltage Reduction 273

8.5 Summary 279

8.6 Exercises 280

References 281

A SPICE Model File 283

B SPICE Netlist of Voltage Reference Circuit 287

Index 289

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CMOS Voltage References An Analytical and Practical Perspective

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