Low-Voltage Cmos Vlsi Circuits

Low-voltage very large scale integration (VLSI) circuits represent the electronics of the future. All electronic products are striving to reduce power consumption to create more economical, efficient, and compact devices. Despite the inevitable trend towards low-voltage, few books address the technology needed. Geared to the needs of engineers and designers in the field, this comprehensive volume presents a remarkably detailed analysis of one of today's hottest and most compelling research techniques for VLSI systems.An Instructor's Manual presenting detailed solutions to all the problems in the book is available from the Wiley editorial department.

JAMES B. KUO is Professor of Electrical Engineering at the National Taiwan University. A highly recognized expert in the field, Professor Kuo has published numerous papers as well as three books on CMOS VLSI.JEA-HONG LOU holds a PhD in electrical engineering from the National Taiwan University. His research specialty is circuit design for CMOS VLSI.

Acknowledgments

v

(2)

Preface

vii

1 Introduction

1

(12)

1.1 Why CMOS?

1

(2)

1.2 Why Low-Voltage?

3

(6)

1.2.1 Side Effects of Low-Voltage

6

(1)

1.2.2 Supply Voltage Reduction Strategy

7

(2)

1.3 Objectives

9

(2)

References

11

(2)

2 CMOS Technology and Devices

13

(72)

2.1 Evolution of CMOS Technology

13

(4)

2.2 0.25(Mu)m CMOS Technology

17

(1)

2.3 Shallow Trench Isolation

18

(2)

2.4 LDD

20

(1)

2.5 Buried Channel

21

(3)

2.6 BiCMOS Technology

24

(5)

2.7 0.1(Mu)m CMOS Technology

29

(3)

2.8 SOI CMOS Technology

32

(6)

2.9 Threshold Voltage

38

(3)

2.10 Body Effect

41

(1)

2.11 Short Channel Effects

42

(2)

2.12 Narrow Channel Effects

44

(1)

2.13 Mobility & Drain Current

44

(5)

2.14 Subthreshold Current

49

(4)

2.15 Electron Temperature

53

(8)

2.16 Velocity Overshoot

61

(1)

2.17 MOS Capacitances

61

(9)

2.18 Hot Carrier Effects

70

(4)

2.19 BSIM SPICE Models

74

(5)

2.20 Summary

79

(1)

References

79

(4)

Problems

83

(2)

3 CMOS Static Logic Circuits

85

(78)

3.1 Basic CMOS Circuits

85

(1)

3.2 CMOS Inverters

86

(15)

3.2.1 CMOS Static Logic Circuits

96

(2)

3.2.2 Difficulties for Low-Power and Low-Voltage Operations

98

(3)

3.3 CMOS Differential Static Logic

101

(7)

3.3.1 Differential Cascode Voltage Switch (DCVS) Logic

101

(2)

3.3.2 Differential Split-Level (DSL) Logic

103

(2)

3.3.3 Differential Cascode Voltage Switch with Pass-Gate (DCVSPG) Logic

105

(3)

3.4 CMOS Pass-Transistor Logic

108

(7)

3.4.1 Pass-Transistor Logic Fundamentals

108

(2)

3.4.2 Other Pass-Transistor Logics

110

(3)

3.4.3 CAD for Pass-Transistor Logic

113

(2)

3.5 BiCMOS Static Logic Circuits

115

(13)

3.5.1 Standard BiCMOS

116

(9)

3.5.2 Sub-3V BiCMOS

125

(1)

3.5.3 1.5V BiCMOS Logic with Transient Feedback

126

(1)

3.5.4 1.5V Bootstrapped BiCMOS Logic

127

(1)

3.6 SOI CMOS Static Logic

128

(4)

3.7 Low-Voltage CMOS Static Logic Circuit Techniques

132

(8)

3.7.1 Bootstrapped CMOS Driver

132

(3)

3.7.2 Multi-Threshold Standby/Active Techniques

135

(5)

3.8 Low-Power CMOS Circuit Techniques

140

(17)

3.8.1 Bus Architecture Approach

145

(8)

3.8.2 Adiabatic Logic

153

(4)

3.9 Summary

157

(1)

References

157

(4)

Problems

161

(2)

4 CMOS Dynamic Logic Circuits

163

(72)

4.1 Basic Concepts of Dynamic Logic Circuits

163

(4)

4.2 Charge-Sharing Problems

167

(4)

4.3 Noise Problem

171

(1)

4.4 Race Problem

172

(1)

4.5 NORA

172

(5)

4.6 Zipper

177

(1)

4.7 Domino

178

(12)

4.7.1 Latched Domino

182

(3)

4.7.2 Skew-Tolerant Domino

185

(3)

4.7.3 Multiple-Output Domino Logic (MODL)

188

(2)

4.8 Dynamic Differential

190

(6)

4.9 True-Single-Phase Clocking (TSPC)

196

(10)

4.10 BiCMOS Dynamic Logic Circuits

206

(11)

4.10.1 1.5V BiCMOS Dynamic Logic Circuit

209

(4)

4.10.2 1.5V BiCMOS Latch

213

(1)

4.10.3 Charge-Sharing Problems

214

(3)

4.11 Low-Voltage Dynamic Logic Techniques

217

(12)

4.11.1 Bootstrapped Dynamic Logic (BDL) Circuit

218

(4)

4.11.2 Bootstrapped All-N-Logic TSP Bootstrapped Dynamic Logic

222

(3)

4.11.3 Semi-Dynamic DCVSPG-Domino Logic Circuits

225

(4)

4.12 Summary

229

(1)

References

229

(4)

Problems

233

(2)

5 CMOS Memory

235

(110)

5.1 SRAM

236

(28)

5.1.1 Basics

236

(3)

5.1.2 Memory Cells

239

(4)

5.1.3 Decoders

243

(3)

5.1.4 Bit-Line Related Architecture and Sense Amps

246

(2)

5.1.5 SRAM Architecture

248

(2)

5.1.6 Critical Path Analysis

250

(7)

5.1.7 Application-Specific SRAM

257

(4)

5.1.8 Low-Voltage SRAM Techniques

261

(3)

5.2 DRAM

264

(22)

5.2.1 Memory Cells

265

(3)

5.2.2 Bit-Line Architecture

268

(6)

5.2.3 Advanced Architecture

274

(2)

5.2.4 Low-Power DRAM Techniques

276

(2)

5.2.5 Low-Voltage DRAM Techniques

278

(8)

5.3 BiCMOS Memories

286

(13)

5.3.1 BiCMOS SRAM

287

(8)

5.3.2 BiCMOS DRAM

295

(4)

5.4 SOI Memory

299

(8)

5.4.1 SOI SRAM

299

(3)

5.4.2 SOI DRAM

302

(5)

5.5 Nonvolatile Memory

307

(21)

5.5.1 ROM

308

(3)

5.5.2 EPROM

311

(3)

5.5.3 EEPROM

314

(3)

5.5.4 Flash Memory

317

(11)

5.6 Ferroelectric RAM (FRAM)

328

(9)

5.7 Summary

337

(1)

References

337

(6)

Problems

343

(2)

6 CMOS VLSI Systems

345

(88)

6.1 Adders

345

(18)

6.1.1 Basic Principles

345

(2)

6.1.2 Carry Look-Ahead Adder

347

(2)

6.1.3 Manchester CLA Adder

349

(2)

6.1.4 PT-Based CLA Adder

351

(1)

6.1.5 PT-Based Conditional Carry-Select CLA Adder

352

(3)

6.1.6 Enhanced MODL Adder

355

(2)

6.1.7 Carry-Skip CLA Circuit

357

(2)

6.1.8 Parallel and Pipelined Adders

359

(4)

6.2 Multipliers

363

(7)

6.2.1 Modified Booth Algorithm

366

(2)

6.2.2 Advanced Structure

368

(2)

6.3 Register File and Cache Memory

370

(10)

6.4 Programmable Logic Array

380

(6)

6.5 Phase-Locked Loop

386

(8)

6.6 Processing Unit

394

(24)

6.6.1 Central Processing Unit (CPU)

394

(14)

6.6.2 Floating-Point Processing Unit

408

(4)

6.6.3 Digital Signal Processing Unit

412

(6)

6.7 Other Technologies

418

(9)

6.7.1 BiCMOS Systems

418

(5)

6.7.2 SOI Systems

423

(4)

6.8 Summary

427

(1)

References

427

(4)

Problems

431

(2)

Index

433

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Low-Voltage Cmos Vlsi Circuits

Summary

Author Biography

Table of Contents

Supplemental Materials