Practical FPGA Programming in C

FPGA brings high performance applications to market quickly - this book covers the many emerging platforms in a proven, effective manner.

Author Bio

David Pellerin is president and founder of Impulse Accelerated Technologies, a firm that serves systems designers who want to use FPGAs for hardware-based software acceleration and fast prototyping of mixed hardware/software systems. His Prentice Hall PTR books include VHDL Made Easy, Practical Design Using Programmable Logic, Digital Design Using ABEL, and Electronic Design Automation for Windows. Scott Thibault is president and founder of Green Mountain Computing Systems, developers of custom and OEM software that leverages advanced HDL and C-to-RTL expertise to improve time-to-market. Dr. Thibault holds a Ph.D. in computer science from the University of Rennes.

Foreword by Clive "Max" Maxfield

xiii

Why is this book of interest to the hardware folks?

xiii

And what about the software guys and gals?

xv

So what's the catch?

xvi

Preface

xvii

C Language for FPGA-Based Hardware Design?

xviii

Compelling Platforms for Software Acceleration

xix

The Power to Experiment

xxi

How This Book Is Organized

xxi

Where This Book Came From

xxii

Acknowledgments

xxiii

CHAPTER 1 The FPGA as a Computing Platform

1

(16)

1.1 A Quick Introduction to FPGAs

2

(2)

1.2 FPGA-Based Programmable Hardware Platforms

4

(2)

1.3 Increasing Performance While Lowering Costs

6

(2)

1.4 The Role of Tools

8

(2)

1.5 The FPGA as an Embedded Software Platform

10

(2)

1.6 The Importance of a Programming Abstraction

12

(1)

1.7 When Is C Language Appropriate for FPGA Design?

13

(2)

1.8 How to Use This Book

15

(2)

CHAPTER 2 A Brief History of Programmable Platforms

17

(14)

2.1 The Origins of Programmable Logic

18

(5)

2.2 Reprogrammability, HDLs, and the Rise of the FPGA

23

(2)

2.3 Systems on a Programmable Chip

25

(2)

2.4 FPGAs for Parallel Computing

27

(2)

2.5 Summary

29

(2)

CHAPTER 3 A Programming Model for FPGA-Based Applications

31

(14)

3.1 Parallel Processing Models

32

(3)

3.2 FPGAs as Parallel Computing Machines

35

(3)

3.3 Programming for Parallelism

38

(1)

3.4 Communicating Process Programming Models

39

(2)

3.5 The Impulse C Programming Model

41

(2)

3.6 Summary

43

(2)

CHAPTER 4 An Introduction to Impulse C

45

(42)

4.1 The Motivation Behind Impulse C

47

(1)

4.2 The Impulse C Programming Model

48

(2)

4.3 A Minimal Impulse C Program

50

(8)

4.4 Processes, Streams, Signals, and Memory

58

(1)

4.5 Impulse C Signed and Unsigned Datatypes

59

(1)

4.6 Understanding Processes

59

(4)

4.7 Understanding Streams

63

(3)

4.8 Using Output Streams

66

(1)

4.9 Using Input Streams

67

(2)

4.10 Avoiding Stream Deadlocks

69

(4)

4.11 Creating and Using Signals

73

(1)

4.12 Understanding Registers

74

(2)

4.13 Using Shared Memories

76

(5)

4.14 Memory and Stream Performance Considerations

81

(5)

4.15 Summary

86

(1)

CHAPTER 5 Describing a FIR Filter

87

(16)

5.1 Design Overview

87

(1)

5.2 The FIR Filter Hardware Process

88

(2)

5.3 The Software Test Bench

90

(7)

5.4 Desktop Simulation

97

(1)

5.5 Application Monitoring

98

(2)

5.6 Summary

100

(3)

CHAPTER 6 Generating FPGA Hardware

103

(30)

6.1 The Hardware Generation Flow

104

(4)

6.2 Understanding the Generated Structure

108

(4)

6.3 Stream and Signal Interfaces

112

(4)

6.4 Using HDL Simulation to Understand Stream Protocols

116

(3)

6.5 Debugging the Generated Hardware

119

(6)

6.6 Hardware Generation Notes

125

(2)

6.7 Making Efficient Use of the Optimizers

127

(2)

6.8 Language Constraints for Hardware Processes

129

(2)

6.9 Summary

131

(2)

CHAPTER 7 Increasing Statement-Level Parallelism

133

(14)

7.1 A Model of FPGA Computation

133

(2)

7.2 C Language Semantics and Parallelism

135

(1)

7.3 Exploiting Instruction-Level Parallelism

135

(4)

7.4 Limiting Instruction Stages

139

(2)

7.5 Unrolling Loops

141

(1)

7.6 Pipelining Explained

142

(3)

7.7 Summary

145

(2)

CHAPTER 8 Porting a Legacy Application to Impulse C

147

(16)

8.1 The Triple-DES Algorithm

148

(2)

8.2 Converting the Algorithm to a Streaming Model

150

(5)

8.3 Performing Software Simulation

155

(1)

8.4 Compiling to Hardware

156

(3)

8.5 Preliminary Hardware Analysis

159

(1)

8.6 Summary

160

(3)

CHAPTER 9 Creating an Embedded Test Bench

163

(32)

9.1 A Mixed Hardware and Software Approach

164

(1)

9.2 The Embedded Processor as a Test Generator

165

(3)

9.3 The Role of Hardware Simulators

168

(1)

9.4 Testing the Triple-DES Algorithm in Hardware

168

(6)

9.5 Software Stream Macro Interfaces

174

(1)

9.6 Building the Test System

175

(19)

9.7 Summary

194

(1)

CHAPTER 10 Optimizing C for FPGA Performance

195

(14)

10.1 Rethinking an Algorithm for Performance

196

(3)

10.2 Refinement 1: Reducing Size by Introducing a Loop

199

(1)

10.3 Refinement 2: Array Splitting

199

(2)

10.4 Refinement 3: Improving Streaming Performance

201

(2)

10.5 Refinement 4: Loop Unrolling

203

(1)

10.6 Refinement 5: Pipelining the Main Loop

204

(4)

10.7 Summary

208

(1)

CHAPTER 11 Describing System-Level Parallelism

209

(48)

11.1 Design Overview

210

(3)

11.2 Performing Desktop Simulation

213

(1)

11.3 Refinement 1: Creating Parallel 8-Bit Filters

214

(5)

11.4 Refinement 2: Creating a System-Level Pipeline

219

(12)

11.5 Moving the Application to Hardware

231

(25)

11.6 Summary

256

(1)

CHAPTER 12 Combining Impulse C with an Embedded Operating System

257

(22)

12.1 The uClinux Operating System

257

(2)

12.2 A uClinux Demonstration Project

259

(18)

12.3 Summary

277

(2)

CHAPTER 13 Mandelbrot Image Generation

279

(22)

13.1 Design Overview

280

(2)

13.2 Expressing the Algorithm in C

282

(3)

13.3 Creating a Fixed-Point Equivalent

285

(1)

13.4 Creating a Streaming Version

286

(4)

13.5 Parallelizing the Algorithm

290

(7)

13.6 Future Refinements

297

(2)

13.7 Summary

299

(2)

CHAPTER 14 The Future of FPGA Computing

301

(8)

14.1 The FPGA as a High-Performance Computer

302

(3)

14.2 The Future of FPGA Computing

305

(2)

14.3 Summary

307

(2)

APPENDIX A Getting the Most Out of Embedded FPGA Processors

309

(16)

A.1 FPGA Embedded Processor Overview

310

(2)

A.2 Peripherals and Memory Controllers

312

(1)

A.3 Increasing Processor Performance

313

(1)

A.4 Optimization Techniques That Are Not FPGA-Specific

314

(5)

A.5 FPGA-Specific Optimization Techniques

319

(3)

A.6 Summary

322

(3)

APPENDIX B Creating a Custom Stream Interface

325

(16)

B.1 Application Overview

326

(1)

B.2 The DS92LV16 Serial Link for Data Streaming

327

(2)

B.3 Stream Interface State Machine Description

329

(2)

B.4 Data Transmission

331

(1)

B.5 Summary

332

(9)

APPENDIX C Impulse C Function Reference

341

(34)

APPENDIX D Triple-DES Source Listings

375

(30)

APPENDIX E Image Filter Listings

405

(12)

APPENDIX F Selected References

417

(2)

Index

419

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Practical FPGA Programming in C

Summary

Author Biography

Table of Contents

Supplemental Materials