Reconfigurable System Design and Verification

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ISBN: 9781420062663 | 1420062662
Cover: Hardcover
Copyright: 2/17/2009

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Reconfigurable systems have pervaded nearly all fields of computation and will continue to do so for the foreseeable future. Reconfigurable System Design and Verification provides a compendium of design and verification techniques for reconfigurable systems, allowing you to quickly search for a technique and determine if it is appropriate to the task at hand. It bridges the gap between the need for reconfigurable computing education and the burgeoning development of numerous different techniques in the design and verification of reconfigurable systems in various application domains.

Preface
Introduction to Reconfigurable Computing	p. 1
Why Reconfigurable Computing?	p. 2
What is Reconfigurable Computing?	p. 3
From Codesign to Reconfiguration	p. 4
Reconfiguration Technology	p. 6
Reconfiguration Tools and Platforms	p. 7
Design and Verification Methodologies	p. 8
Application Examples	p. 9
Embedded Systems	p. 10
Network Security Applications	p. 10
Multimedia Applications	p. 11
Scientific Computing	p. 11
Reconfigurable SAT Solvers	p. 12
FPGA Technology and Dynamic Reconfiguration	p. 15
FPGA Overview	p. 16
FPGA Architecture	p. 17
The Configuration Bitstream	p. 21
Overall Bitstream Structure	p. 22
Packet Headers	p. 22
Configuration Registers	p. 23
Frame Indexing	p. 25
FPGA Families and Models	p. 26
Spartan 3	p. 27
Virtex II Pro	p. 27
Virtex 4	p. 28
Configuration Conventions and File Formats	p. 30
Configuration Resources Numbering Scheme	p. 30
The RPM Grid	p. 31
UCF File Format	p. 33
A Bird's-Eye View of Reconfigurable Systems	p. 33
Reconfiguration Characterization	p. 35
Complete vs. Partial Reconfiguration: An Overview of Different Techniques	p. 36
Reconfigurable Architectures: The Five Ws	p. 38
Reconfigurable Architecture Examples	p. 41
Reconfigurable Hardware Design	p. 45
Model	p. 46
Partitioning for Reconfigurable Architectures	p. 48
Temporal Partitioning Approaches	p. 49
Spatial and Temporal Partitioning Approaches	p. 53
Regularity Extraction	p. 54
Tree-Shaped Recurrent Structure Detection	p. 55
The DRESD Partitioning-Based Approach	p. 60
Scheduling Techniques	p. 73
Related Work	p. 73
ILP Formulation	p. 75
Heuristic	p. 78
Operating System for Reconfigurable Systems	p. 87
Motivation for OS4RS	p. 87
Requirements for OS4RS	p. 88
Layered Architecture for OS4RS	p. 90
Hardware Layer	p. 91
Configuration Layer	p. 93
Placement Layer	p. 93
Scheduling Layer	p. 103
Module Layer	p. 119
Application Layer	p. 122
OS4RS Examples	p. 123
Dynamic Reconfigurable Systems Design Flows	p. 127
System Design Flows	p. 127
Basic Flows	p. 128
Generic Flows	p. 129
Reconfigurable System Design Flow: Structure and Implementation	p. 132
The Hardware Side of the Design Flow	p. 135
System Description Phase	p. 135
Design Synthesis and Placement Constraints Assignment Phase	p. 142
System Generation Phase	p. 150
Reconfigurable System Verification	p. 155
System-Level Verification Techniques	p. 155
Formal Verification	p. 155
Language Approach	p. 156
Hardware-Software Coverification	p. 157
Hardware-Software Co-Simulation	p. 158
Hardware-Software Prototyping	p. 159
Reconfigurable System Simulation Frameworks	p. 159
Overview of Frameworks	p. 161
Perfecto Framework	p. 162
Reconfigurable Architecture Model	p. 163
Application Model	p. 169
Partitioning	p. 171
Scheduling	p. 173
Placement	p. 174
Performance Evaluation Results	p. 176
Application Examples	p. 177
Dynamically Partially Reconfigurable System Design Implementation	p. 185
Partial Reconfiguration on Xilinx Virtex Family FPGAs	p. 186
Early Access Partial Reconfiguration Design Flow	p. 189
Design Partitioning and Synthesis	p. 192
Design Budgeting	p. 195
Non-PR Design	p. 196
Top-Level Implementation	p. 197
Static Logic Implementation	p. 197
PR Block Implementation	p. 198
Merge	p. 198
Creating Partially Reconfigurable Hardware Design	p. 199
Software-Controlled Partially Reconfigurable Design	p. 207
Operating System for Reconfigurable Systems	p. 217
References	p. 225
Index	p. 245
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