System on Package Miniaturization of the Entire System

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ISBN: 9780071459068 | 0071459065
Cover: Hardcover
Copyright: 5/6/2008

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System-on-Package (SOP) is an emerging microelectronic technology that places an entire system on a single chip-size package. Where "systems" used to be bulky boxes housing hundreds of components, SOP saves interconnection time and heat generation by keep a full system with computing, communications, and consumer functions all in a single chip. Written by the Georgia Tech developers of the technology, this book explains the basic parameters, design functions, and manufacturing issues, showing electronic designers how this radical new packaging technology can be used to solve pressing electronics design challenges.

Foreword	p. xvii
Preface	p. xix
Introduction to the System-on-Package (SOP) Technology	p. 3
Introduction	p. 4
Electronic System Trend to Digital Convergence	p. 5
Building Blocks of an Electronic System	p. 7
System Technologies Evolution	p. 8
Five Major System Technologies	p. 11
System-on-Board (SOB) Technology with Discrete Components	p. 11
System-on-Chip (SOC) with Two or More System Functions on a Single Chip	p. 11
Multichip Module (MCM): Package-Enabled Integration of Two or More Chips Interconnected Horizontally	p. 13
Stacked ICs and Packages (SIP): Package-Enabled IC Integration with Two or More Chip Stacking (Moore's Law in the Third Dimension)	p. 13
System-on-Package Technology (Module with the Best of IC and System Integration)	p. 18
Miniaturization Trend	p. 22
Comparison of the Five System Technologies	p. 23
Status of SOP around the Globe	p. 26
Opto SOP	p. 26
RF SOP	p. 28
Embedded Passives SOP	p. 29
MEMS SOP	p. 29
SOP Technology Implementations	p. 29
SOP Technologies	p. 33
Summary	p. 34
Acknowledgment	p. 34
References	p. 34
Introduction to System-on-Chip (SOC)	p. 39
Introduction	p. 40
Key Customer Requirements	p. 42
SOC Architecture	p. 44
SOC Design Challenge	p. 50
SOC Design Phase 1-SOC Definition and Challenges	p. 50
SOC Design Phase II-SOC Create Process and Challenges	p. 57
Summary	p. 76
References	p. 76
Stacked ICs and Packages (SIP)	p. 81
SIP Definition	p. 82
Definition	p. 82
Applications	p. 82
CEO Figure and SIP Categories	p. 82
SIP Challenges	p. 85
Materials and Process Challenges	p. 85
Mechanical Challenges	p. 87
Electrical Challenges	p. 88
Thermal Challenges	p. 89
Non-TSV SIP	p. 93
Historical Evolution of Non-TSV SIP	p. 93
Chip Stacking	p. 96
Package Stacking	p. 113
Chip Stacking versus Package Stacking	p. 120
TSV SIP	p. 121
Introduction	p. 121
Historical Evolution of 3D TSV Technology	p. 124
Basic TSV Technologies	p. 126
Different 3D Integration Technologies using TSV	p. 134
Si Carrier Technology	p. 141
Future Trends	p. 143
Acknowledgments	p. 144
References	p. 144
Mixed-Signal (SOP) Design	p. 151
Introduction	p. 152
Mixed-Signal Devices and Systems	p. 153
Importance of Integration in Mobile Applications	p. 155
Mixed-Signal Architecture	p. 156
Mixed-Signal Design Challenges	p. 157
Fabrication Technologies	p. 159
Design of Embedded Passives in RF Front End	p. 160
Embedded Inductors	p. 161
Embedded Capacitors	p. 166
Embedded Filters	p. 167
Embedded Baluns	p. 171
Filter-Balun Networks	p. 175
Tunable Filters	p. 178
Chip-Package Codesign	p. 180
Low Noise Amplifier Design	p. 181
Concurrent Oscillator Design	p. 184
Design of WLAN Front-End Module	p. 191
Design Tools	p. 194
Synthesis of Embedded RF Circuits	p. 195
Modeling of Signal and Power Delivery Networks	p. 198
Rational Functions, Network Synthesis, and Transient Simulation	p. 204
Design for Manufacturing	p. 208
Coupling	p. 214
Analog-to-Analog Coupling	p. 214
Digital-to-Analog Coupling	p. 222
Decoupling	p. 227
Need for Decoupling in Digital Applications	p. 228
Issues with SMD Capacitors	p. 229
Embedded Decoupling	p. 230
Characterization of Embedded Capacitors	p. 235
Electromagnetic Bandgap (EBG) Structures	p. 239
Analysis and Design of EBG Structures	p. 242
Application of EBGs in Power Supply Noise Suppression	p. 246
Radiation Analysis of EBGs	p. 248
Summary	p. 250
Acknowledgments	p. 251
References	p. 251
Radio Frequency System-on-Package (RF SOP)	p. 261
Introduction	p. 262
RF SOP Concept	p. 262
Historical Evolution of RF Packaging Technologies	p. 265
RF SOP Technologies	p. 267
Modeling and Optimization	p. 267
RF Substrate Materials Technologies	p. 268
Antennas	p. 269
Inductors	p. 278
RF Capacitors	p. 282
Resistors	p. 288
Filters	p. 295
Baluns	p. 297
Combiners	p. 298
RF MEMS Switches	p. 300
RFIDs	p. 305
Integrated RF Modules	p. 308
WLAN	p. 308
Intelligent Network Communicator (INC)	p. 310
Future Trends	p. 312
Acknowledgments	p. 313
References	p. 314
Integrated Chip-to-Chip Optoelectronic SOP	p. 321
Introduction	p. 322
Applications of Optoelectronic SOP	p. 323
High-Speed Digital Systems and High-Performance Computing	p. 323
RF-Optical Communication Systems	p. 324
Integration Challenges in Thin-Film Optoelectronic SOP	p. 325
Optical Alignment	p. 326
Key Physical and Optical Properties of Thin-Film Optical Waveguide Materials	p. 326
Advantages of Optoelectronic SOP	p. 331
Comparison of High-Speed Electrical and Optical Wiring Performance	p. 331
Wiring Density	p. 332
Power Dissipation	p. 334
Reliability	p. 335
Evolution of Optoelectronic SOP Technology	p. 336
Board-to-Board Optical Wiring	p. 336
Chip-to-Chip Optical Interconnects	p. 339
Optoelectronic SOP Thin-Film Components	p. 341
Passive Thin-Film Lightwave Circuits	p. 342
Active Optoelectronic SOP Thin-Film Components	p. 354
Opportunities for 3D Lightwave Circuits	p. 355
SOP Integration: Interface Optical Coupling	p. 357
On-Chip Optical Circuits	p. 363
Future Trends in Optoelectronic SOP	p. 365
Summary	p. 365
References	p. 366
Table 6.1 References	p. 374
SOP Substrate with Multilayer Wiring and Thin-Film Embedded Components	p. 377
Introduction	p. 378
Historical Evolution of Substrate Integration Technologies	p. 380
SOP Substrate	p. 381
Drivers and Challenges	p. 381
Ultrathin-Film Wiring with Embedded Low-K Dielectrics, Cores, and Conductors	p. 384
Embedded Passives	p. 415
Embedded Actives	p. 430
Miniaturized Thermal Materials and Structures	p. 434
Future SOP Substrate Integration	p. 435
Acknowledgments	p. 437
References	p. 437
Mixed-Signal (SOP) Reliability	p. 443
System-Level Reliability Considerations	p. 445
Failure Mechanisms	p. 446
Design-for-Reliability	p. 447
Reliability Verification	p. 449
Reliability of Multifunction SOP Substrate	p. 450
Materials and Process Reliability	p. 450
Digital Function Reliability and Verification	p. 458
RF Function Reliability and Verification	p. 461
Optical Function Reliability and Verification	p. 463
Multifunction System Reliability	p. 467
Substrate-to-IC Interconnection Reliability	p. 468
Factors Affecting the Substrate-to-IC Interconnection Reliability	p. 469
100-¿m Flip-Chip Assembly Reliability	p. 471
Reliability against Die Cracking	p. 476
Solder Joint Reliability	p. 476
Interfacial Adhesion and Effect of Moisture on Underfill Reliability	p. 478
Future Trends and Directions	p. 482
Extending Solder	p. 483
Complaint Interconnects	p. 484
Alternative to Solder and Nano Interconnects	p. 484
Summary	p. 486
References	p. 487
MEMS Packaging	p. 495
Introduction	p. 496
Challenges in MEMS Packaging	p. 497
Chip-Scale versus Wafer-Scale Packaging	p. 497
Wafer Bonding Techniques	p. 499
Direct Bonding	p. 500
Bonding Using Intermediate Layers	p. 500
Sacrificial Film-Based Sealing Techniques	p. 505
Etching the Sacrificial Material	p. 505
Decomposition of Sacrificial Polymers	p. 509
Low-Loss Polymer Encapsulation Techniques	p. 514
Techniques Utilizing Getters	p. 516
Nonevaporable Getters	p. 516
Thin-Film Getters	p. 517
Improving MEMS Reliability through Getters	p. 520
Interconnections	p. 522
Assembly	p. 524
Summary and Future Trends	p. 527
References	p. 528
Wafer-Level SOP	p. 535
Introduction	p. 536
Definition	p. 536
Wafer-Level Packaging-Historical Evolution	p. 537
Buildup Wiring and Redistribution	p. 540
IC-Package Pitch Gap	p. 540
Redistribution Layers on Si to Close the Pitch Gap	p. 543
Wafer-Level Thin-Film Embedded Components	p. 544
Embedded Thin-Film Components in the ReDistribution Layer (RDL)	p. 544
Wafer-Level Packaging and Interconnections (WLPI)	p. 548
Classes of Wafer-Level Packaging and Interconnections (WLPI)	p. 552
Rigid Interconnections	p. 560
WLSOP Assembly	p. 585
WLSOP	p. 590
Wafer-Level Probing and Burn-In	p. 591
Summary	p. 595
Acknowledgments	p. 595
References	p. 595
Thermal SOP	p. 605
Fundamentals of Thermal SOP	p. 606
Thermal Implications of SOP	p. 607
System-Level Thermal Constraints in SOP-Based Portables	p. 609
Thermal Sources in SOP Modules	p. 610
Digital SOP	p. 611
RF SOP	p. 613
Optoelectronic SOP	p. 615
MEMS SOP	p. 617
Fundamental Heat Transfer Modes	p. 618
Conduction	p. 618
Convection	p. 623
Radiation	p. 626
Fundamentals of Thermal Characterization	p. 629
Numerical Methods for Thermal Characterization	p. 629
Experimental Methods for Thermal Characterization	p. 637
Thermal Management Technologies	p. 637
Thermal Design Methodologies	p. 638
Power Minimization Methodologies	p. 648
Parallel Processing	p. 649
Dynamic Voltage and Frequency Scaling (DVFS)	p. 649
Application-Specific Processors (ASP)	p. 650
Cache Power Minimization	p. 650
Power Harnessing	p. 651
Summary	p. 651
Acknowledgments	p. 651
References	p. 652
Electrical Test of SOP Modules and Systems	p. 659
SOP Electrical Test Challenges	p. 660
Objectives of the HVM Test Process and Challenges for SOPs	p. 662
HVM Test Flow for SOPs	p. 663
Known Good Embedded Substrate Test	p. 664
Substrate Interconnect Tests	p. 664
Testing Embedded Passives	p. 671
Known Good Embedded Module Test of Digital Subsystems	p. 677
Boundary Scan-IEEE 1149.1	p. 677
Multi-gigahertz Digital Test: Recent Developments	p. 681
KGEM Test of Mixed-Signal and RF Subsystems	p. 685
Test Strategies	p. 685
Fault Models and Test Quality	p. 688
Direct Measurement of Specifications Using Dedicated Circuitry	p. 689
Alternate Testing Methods for Mixed-Signal and RF Circuits	p. 690
Summary	p. 707
Acknowledgments	p. 707
References	p. 707
Biosensor SOP	p. 717
Introduction to Biosensor SOP	p. 717
SOP: A Highly Miniaturized Electronic System Technology	p. 717
Biosensor SOP for Miniaturized Biomedical Implants and Sensor Systems	p. 718
Building Blocks of Biosensor SOP	p. 723
Biosensing	p. 723
Microchannels for Biofluid Transport	p. 723
Biosensing Element (Probe) Design and Preparation	p. 724
Probe-Target Molecular Hybridization	p. 727
Signal Conversion	p. 730
Nanomaterials and Nanostructures for Signal Conversion Components	p. 730
Surface Modification and Biofunctionalization of Signal Conversion Component	p. 734
Signal Conversion Methods	p. 735
Signal Detection and Electronic Processing	p. 741
Low-Power Application-Specific Integrated Circuits (ASICs) and Mixed-Signal Design for Biosensor SOP	p. 741
Bio- SOP Substrate Integration Technologies	p. 744
Summary and Future Trends	p. 745
Nano Bio-SOP Integration Challenges	p. 745
References	p. 746
Index	p. 749
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System on Package Miniaturization of the Entire System

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