The VLSI Handbook, Second Edition

At the cusp of the last century, Wai-Kai Chen introduced a monumental reference for the design, analysis, and prediction of VLSI circuits: The VLSI Handbook. Significantly revised, revamped, and updated to keep pace with the most dynamic field in engineering, this second edition has expanded to 13 sections comprising nearly 100 chapters focused on the key concepts, models, and equations.Written by a stellar international panel of expert contributors, this handbook is still the most up-to-date, reliable, and comprehensive source for real answers to practical problems. The emphasis remains on the fundamental theory underlying professional applications, and new sections reflect recent areas of industrial and research focus.WHAT'S NEW IN THE SECOND EDITION?New Sections on…· Low-power electronics and design· VLSI signal processingNew Chapters on…· CMOS fabrication· Content-addressable memory· Compound semiconductor RF circuits· High-speed circuit design principlesCompletely Revised Chapters and Sections on…· SiGe HBT technology· Bipolar junction transistor amplifiers· Performance modeling and analysis using SystemC· Design languages, expanded from two chapters to twelve· Testing of digital systemsStructured for convenient navigation and loaded with practical solutions, The VLSI Handbook, Second Edition remains the first choice for answers to the problems and challenges faced daily in engineering practice.

Bipolar technology
CMOS/BiCMOS technology
Silicon-on-insulator technology
SiGe HBT technology
Silicon carbide technology
Passive components
Power IC technologies
Microelectronics packaging
Multichip module technologies
Bipolar junction transistor circuits
RF passive IC components
CMOS fabrication
Analog circuit simulation
Interconnect modeling and simulation
System-level power management : an overview
Communication-based design for nanoscale SoCs
Power-aware architectural synthesis
Dynamic voltage scaling for low-power hard real-time systems
Low-power microarchitecture techniques and compiler design techniques
Architecture and design flow optimizations for power-aware FPGAs
Technology scaling and low-power circuit design
CMOS amplifier design
Bipolar junction transistor amplifiers
High-frequency amplifiers
Operational transconductance amplifiers
Expressions of logic functions
Basic theory of logic functions
Simplification of logic expressions
Binary decision diagrams
Logic synthesis with AND and OR gates in two levels
Sequential networks
Logic synthesis with AND and OR gates in multi-levels
Logic properties of transistor circuits
Logic synthesis with NAND (or NOR) gates in multi-levels
Logic synthesis with a minimum number of negative gates
Logic synthesizer with optimizations in two phases
Logic synthesizer by the transduction method
Emitter-coupled logic
CMOS
Pass transistors
Adders
Multipliers
Dividers
Full-custom and semi-custom design
Programmable logic devices
Gate arrays
Field-programmable gate arrays
Cell-library design approach
Comparison of different design approaches
System timing
Rom/Prom/Eprom
SRAM
Embedded memory
Flash memories
Dynamic random access memory
Content-addressable memory
Low-power memory circuits
Nyquist-rate ADC and DAC
Oversampled analog-to-digital and digital-to-analog converters
RF communication circuits
PLL circuits
Switched-capacitor filters
Timing and signal integrity analysis
Microprocessor design verification
Microprocessor layout method
Architecture
Logic synthesis for field programmable gate array (FPGA) technology
Design for testability and test architectures
Automatic test pattern generation
Built-in self-test
Compound semiconductor materials
Compound semiconductor devices for analog and digital circuits
Compound semiconductor RF circuits
High-speed circuit design principles
Internet-based micro-electronic design automation (IMEDA) framework
System-level design
Performance modeling and analysis using VHDL and SystemC
Embedded computing systems and hardware/software co-design
Design automation technology roadmap
Computer arithmetic for VLSI signal processing
VLSI architectures for JPEG 2000 EBCOT : design techniques and challenges
VLSI architectures for forward error-control decoders
An exploration of hardware architectures for face detection
Multidimensional logarithmic number system
Languages for design and implementation of hardware
System level design languages
RT level hardware description with VHDL
Register transfer level hardware description with verilog
Register-transfer level hardware description with SystemC
System verilog
VHDL-AMS hardware description language
Verification languages
ASIC and custom IC cell information representation
Test languages
Timing description languages
HDL-based tools and environments
Table of Contents provided by Blackwell. All Rights Reserved.

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The VLSI Handbook, Second Edition

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The VLSI Handbook, Second Edition

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