Multi-Voltage CMOS Circuit Design

This book presents an in-depth treatment of various power reduction and speed enhancement techniques based on multiple supply and threshold voltages. A detailed discussion of the sources of power consumption in CMOS circuits will be provided whilst focusing primarily on identifying the mechanisms by which sub-threshold and gate oxide leakage currents are generated. The authors present a comprehensive review of state-of-the-art dynamic, static supply and threshold voltage scaling techniques and discuss the pros and cons of supply and threshold voltage scaling techniques.

Dr Volkan Kursun, Department of Electrical & Computer Engineering, University of Rochester, Rochester, New York 14627-0231, USA

Professor Dr Eby Friedman, Department of Electrical & Computer Engineering , University of Rochester , Rochester, New York 14627-0231, USA

About the Authors

xi

Preface

xiii

Acknowledgments

xv

Introduction

1

(18)

Evolution of Integrated Circuits

3

(11)

Outline of the Book

14

(5)

Sources of Power Consumption in CMOS ICs

19

(26)

Dynamic Switching Power

19

(3)

Leakage Power

22

(17)

Subthreshold Leakage Current

22

(1)

Short-Channel Effects

23

(2)

Drain-Induced Barrier-Lowering

25

(1)

Characterization of Subthreshold Leakage Current

25

(3)

Gate Oxide Leakage Current

28

(1)

Effect of Technology Scaling on Gate Oxide Leakage

29

(3)

Characterization of Gate Oxide Leakage Current

32

(6)

Alternative Gate Dielectric Materials

38

(1)

Short-Circuit Power

39

(4)

Static DC Power

43

(2)

Supply and Threshold Voltage Scaling Techniques

45

(40)

Dynamic Supply Voltage Scaling

48

(3)

Multiple Supply Voltage CMOS

51

(3)

Threshold Voltage Scaling

54

(23)

Body Bias Techniques

58

(1)

Reverse Body Bias

58

(6)

Forward Body Bias

64

(7)

Bidirectional Body Bias

71

(3)

Multiple Threshold Voltage CMOS

74

(3)

Multiple Supply and Threshold Voltage CMOS

77

(3)

Dynamic Supply and Threshold Voltage Scaling

80

(1)

Circuits with Multiple Voltage and Clock Domains

81

(2)

Summary

83

(2)

Low-Voltage Power Supplies

85

(14)

Linear DC-DC Converters

87

(3)

Switched-Capacitor DC-DC Converters

90

(1)

Switching DC-DC Converters

91

(4)

Operation of a Buck Converter

92

(3)

Power Reduction Techniques for Switching DC-DC Converters

95

(1)

Summary

95

(4)

Buck Converters for On-Chip Integration

99

(16)

Circuit Model of a Buck Converter

101

(3)

MOSFET-Related Power Losses

101

(2)

Filter Inductor-Related Power Losses

103

(1)

Filter Capacitor-Related Power Losses

103

(1)

Total Power Consumption of a Buck Converter

104

(1)

Efficiency Analysis of a Buck Converter

104

(5)

Circuit Analysis for Global Maximum Efficiency

105

(3)

Circuit Analysis with Limited Filter Capacitance

108

(1)

Output Voltage Ripple Constraint

109

(1)

Simulation Results

109

(3)

Summary

112

(3)

Low-Voltage Swing Monolithic DC-DC Conversion

115

(12)

Circuit Model of a Low-Voltage Swing Buck Converter

116

(5)

MOSFET Power Dissipation

118

(1)

MOSFET Model

119

(1)

Filter Inductor Power Dissipation

120

(1)

Low-Voltage Swing Buck Converter Analysis

121

(5)

Full Swing Circuit Analysis for Global Maximum Efficiency

121

(2)

Low Swing Circuit Analysis for Global Maximum Efficiency

123

(3)

Summary

126

(1)

High Input Voltage Step-Down DC-DC Converters

127

(12)

Cascode Bridge Circuits

129

(4)

Cascode Bridge Circuit for Input Voltages up to 2Vmax

129

(1)

Cascode Bridge Circuit for Input Voltages up to 3Vmax

130

(2)

Cascode Bridge Circuit for Input Voltages up to 4Vmax

132

(1)

High Input Voltage Monolithic Switching DC-DC Converters

133

(5)

Operation of Cascode DC-DC Converters

133

(3)

Efficiency Characteristics of DC-DC Converters Operating at Input Voltages up to 2Vmax

136

(1)

Efficiency Characteristics of DC-DC Converters Operating at Input Voltages up to 3Vmax

137

(1)

Summary

138

(1)

Signal Transfer in ICs with Multiple Supply Voltages

139

(8)

A High-Speed and Low-Power Voltage Interface Circuit

140

(1)

Voltage Interface Circuit Simulation Results

141

(3)

Experimental Results

144

(2)

Summary

146

(1)

Domino Logic with Variable Threshold Voltage Keeper

147

(24)

Standard Domino (SD) Logic Circuits

148

(5)

Operation of Standard Domino Logic Circuits

148

(2)

Noise Immunity, Delay, and Energy Tradeoffs

150

(3)

Domino Logic with Variable Threshold Voltage Keeper (DVTVK)

153

(3)

Variable Threshold Voltage Keeper

153

(2)

Dynamic Body Bias Generator

155

(1)

Simulation Results

156

(8)

Multiple-Output Domino Carry Generator with Variable Threshold Voltage Keeper

156

(2)

Improved Delay and Power Characteristics with Comparable Noise Immunity

158

(2)

Improved Noise Immunity with Comparable Delay or Power Characteristics

160

(1)

Clock-Delayed Domino Logic with Variable Threshold Voltage Keeper

161

(2)

Energy Overhead of the Dynamic Body Bias Generator

163

(1)

Domino Logic with Forward and Reverse Body Biased Keeper

164

(5)

Clock-Delayed Domino Logic with Forward and Reverse Body Biased Keeper

165

(3)

Technology Scaling Characteristics of the Reverse and Forward Body Bias Techniques Applied to a Keeper Transistor

168

(1)

Summary

169

(2)

Subthreshold Leakage Current Characteristics of Dynamic Circuits

171

(16)

State-Dependent Subthreshold Leakage Current Characteristics

172

(5)

Noise Immunity

177

(3)

Power and Delay Characteristics in the Active Mode

180

(2)

Dual Threshold Voltage CMOS Technology

182

(4)

Summary

186

(1)

Sleep Switch Dual Threshold Voltage Domino Logic

187

(18)

Existing Sleep Mode Circuit Techniques

188

(2)

Dual Threshold Voltage Domino Logic Employing Sleep Switches

190

(1)

Simulation Results

191

(9)

Subthreshold Leakage Energy Reduction

193

(1)

Stack Effect in Domino Logic Circuits

194

(3)

Delay and Power Reduction in the Active Mode

197

(1)

Sleep/Wake-Up Delay and Energy Overhead

197

(3)

Noise Immunity Compensation

200

(4)

Summary

204

(1)

Conclusions

205

(6)

Bibliography

211

(10)

Index

221

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Multi-Voltage CMOS Circuit Design

Summary

Author Biography

Table of Contents

Supplemental Materials