Signal Integrity Engineer's Companion :

Shows electronic systems design engineers how to use real world test and measurement techniques to eliminate SI problems from their systems.

Dr. Geoff Lawday is Tektronix Professor in Measurement at Buckinghamshire New University, England. He delivers courses in signal integrity engineering and high performance bus systems at the University Tektronix laboratory, and presents signal integrity seminars throughout Europe on behalf of Tektronix David Ireland, European and Asian design and manufacturing marketing manager for Tektronix, has more than 30 years of experience in test and measurement. He writes regularly on signal integrity for leading technical journals Greg Edlund, Senior Engineer, IBM Global Engineering Solutions division, has participated in development and testing for ten high-performance computing platforms

Foreword	p. xv
Preface	p. xix
Acknowledgments	p. xxviii
About the Authors	p. xxx
Introduction: An Engineer's Companion	p. 1
Life Cycle: The Motivation to Develop a Simulation Strategy	p. 2
Prototyping: Interconnecting High-Speed Digital Signals	p. 9
Pre-emphasis	p. 13
The Need for Real-Time Test and Measurement	p. 17
Conclusion	p. 28
Chip-to-Chip Timing and Simulation	p. 31
Root Cause	p. 32
CMOS Latch	p. 32
Timing Failures	p. 35
Setup and Hold Constraints	p. 36
Common-Clock On-Chip Timing	p. 40
Setup and Hold SPICE Simulations	p. 42
Timing Budget	p. 43
Common-Clock IO Timing	p. 45
Common-Clock IO Timing Using a Standard Load	p. 49
Limits of the Common-Clock Architecture	p. 54
Inside IO Circuits	p. 54
CMOS Receiver	p. 55
CMOS Differential Receiver	p. 57
Pin Capacitance	p. 58
Receiver Current-Voltage Characteristics	p. 60
CMOS Push-Pull Driver	p. 61
Output Impedance	p. 63
Output Rise and Fall Times	p. 64
CMOS Current Mode Driver	p. 66
Behavioral Modeling of IO Circuits	p. 68
Behavioral Model for CMOS Push-Pull Driver	p. 69
Behavioral Modeling Assumptions	p. 71
Tour of an IBIS Model	p. 71
IBIS Header	p. 76
IBIS Pin Table	p. 76
IBIS Receiver Model	p. 77
IBIS Driver Model	p. 78
Behavioral Modeling Assumptions (Reprise)	p. 80
Comparison of SPICE and IBIS Models	p. 81
Accuracy and Quality of IO Circuit Models	p. 83
Conclusion	p. 86
Signal Path Analysis as an Aid to Signal Integrity	p. 87
The Transmission Line Environment	p. 89
Characteristic Impedance, Reflections, and Signal Integrity	p. 92
The Reflection Coefficient, Impedance, and TDR Concepts	p. 97
Looking at Real-World Circuit Characteristics	p. 103
TDR Resolution Factors	p. 104
Differential TDR Measurements	p. 109
Frequency Domain Measurements for SI Applications	p. 111
Conclusion	p. 115
DDR2 Case Study	p. 117
Evolution from a Common Ancestor	p. 118
DDR2 Signaling	p. 121
Write Timing	p. 123
Read Timing	p. 125
Get to Know Your IO	p. 127
Off-Chip Driver	p. 128
On-Die Termination	p. 129
Rising and Falling Waveforms	p. 131
Interconnect Sensitivity Analysis	p. 132
Conductor and Dielectric Losses	p. 135
Impedance Tolerance	p. 138
Pin-to-Pin Capacitance Variation	p. 142
Length Variation within a Byte Lane	p. 142
DIMM Connector Crosstalk	p. 143
Vref AC Noise and Resistor Tolerance	p. 147
Slope Derating Factor	p. 149
Final Read and Write Timing Budgets	p. 149
Sources of Conservatism	p. 154
Conclusion	p. 155
Real-Time Measurements: Probing	p. 159
The Anatomy of a Modern Oscilloscope Probe	p. 160
A Probing Strategy	p. 163
Measurement Quality	p. 164
Defining a Probe	p. 164
Oscilloscope Probes	p. 166
Dynamic Range Limitations	p. 172
Advanced Probing Techniques	p. 187
Logic Analyzer Probing	p. 208
Conclusion	p. 212
Testing and Debugging: Oscilloscopes and Logic Analyzers	p. 213
Fundamentals of Signal Integrity	p. 214
Signal Integrity Concepts	p. 215
Verification Tools: Oscilloscopes	p. 221
Verification Tools: Logic Analyzers	p. 227
Combining Analog and Digital Measurements	p. 245
Eye Diagram Analysis	p. 251
Conclusion	p. 253
Replicating Real-World Signals with Signal Sources	p. 255
Observing and Controlling Circuit Behavior	p. 256
Excitation and Control	p. 257
Signal-Generation Techniques	p. 259
Arbitrary Function Generators	p. 261
The Arbitrary Waveform Generator	p. 269
Logic Signal Sources	p. 281
Conclusion	p. 285
Signal Analysis and Compliance	p. 287
Standards Framework	p. 288
High-Performance Tools for Compliance Measurements	p. 293
Validation and Compliance Measurements	p. 296
Understanding Serial Architectures	p. 297
Physical Layer Compliance Testing	p. 306
Measurements on Optical Signals	p. 312
Compliance Measurement Considerations: Analysis	p. 315
Testing the Serial Link	p. 319
Probes and Probing	p. 325
Software Tools	p. 328
Transmitter Measurement Examples	p. 332
Impedance and Link Measurements	p. 334
Receiver Testing Brings Unique Challenges	p. 345
Digital Validation and Compliance	p. 356
Multibus Systems	p. 361
Conclusion	p. 364
PCI Express Case Study	p. 367
High-Speed Serial Interfaces	p. 368
Sensitivity Analysis	p. 371
Ideal Driver and Lossy Transmission Line	p. 373
Differential Driver with De-emphasis	p. 375
Card Impedance Tolerance	p. 379
3D Discontinuities	p. 381
Channel Step Response	p. 383
Crosstalk Pathology	p. 386
Crosstalk-Induced Jitter	p. 387
Channel Characteristics	p. 392
Sensitivity Analysis Results	p. 393
Model-to-Hardware Correlation	p. 396
Conclusion	p. 398
The Wireless Signal	p. 399
Radio Frequency Signals	p. 400
Frequency Measurement	p. 402
Overview of the Real-Time Spectrum Analyzer	p. 407
How a Real-Time Spectrum Analyzer Works	p. 413
Applying Real-Time Spectrum Analysis	p. 417
Conclusion	p. 437
Index	p. 439
Table of Contents provided by Ingram. All Rights Reserved.

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Signal Integrity Engineer's Companion : Real-Time Test and Measurement, and Design Simulation

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Table of Contents

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