Reliability Wearout Mechanisms in Advanced

This invaluable resource tells the complete story of failure mechanismsfrom basic concepts to the tools necessary to conduct reliability tests and analyze the results. Both a text and a reference work for this important area of semiconductor technology, it assumes no reliability education or experience. It also offers the first reference book with all relevant physics, equations, and step-by-step procedures for CMOS technology reliability in one place. Practical appendices provide basic experimental procedures that include experiment design, performing stressing in the laboratory, data analysis, reliability projections, and interpreting projections.

Alvin W. Strong, PhD, is retired from IBM in Essex Junction, Vermont. He holds nineteen patents, has authored or coauthored a number of papers, and is a member of the IEEE and chair of the JEDEC 14.2 standards subcommittee. ERNEST Y. WU, PhD, is a Senior Technical Staff Member at Semiconductor Research and Development Center (SRDC) in the IBM System and Technology Group. He has authored or coauthored more than 100 technical or conference papers. His research interests include dielectric/device reliability and electronic physics. ROLF-PETER VOLLERTSEN, PhD, is a Principal for Reliability Methodology at Infineon Technologies AG in Munich, Germany, where he is responsible for methods and test structures for fast Wafer Level Reliability monitoring and the implementation of fast WLR methods. JORDI SU??, PhD, is Professor of Electronics Engineering at the Universitat Aut?noma de Barcelona, Spain. He is Senior Member of the IEEE and has coauthored over 150 publications on oxide reliability and electron devices. His research interests are in gate oxide physics, reliability statistics, and modeling of nanometer-scale electron devices. GIUSEPPE LaROSA, PhD, is Project Leader of the FEOL technology reliability qualification activities for the development of advanced SOI Logic and eDRAM technologies at IBM, where he is responsible for the implementation and development of state-of-the-art NBTI stress and test methodologies. TIMOTHY D. SULLIVAN, PhD, is Team Leader for metallization reliability at IBM?s Essex Junction facility. The author of numerous technical papers and tutorials, he holds thirteen patents with several more pending. STEWART E. RAUCH, III, PhD, is currently a Senior Technical Staff Member at the IBM SRDC in New York, where he specializes in hot carrier and NBTI reliability of state-of-the-art CMOS devices. He is the author of numerous technical papers and tutorials and holds five patents.

Preface
Introduction
Book Philosophy
Lifetime and Acceleration Concepts
Mechanism Types
Reliability Statistics
Chi-Square and Student t Distributions
Application
Dielectric Characterization And Reliability Methodology
Introduction
Fundamentals of Insulator Physics and Characterization
Measurement of Dielectric Reliability
Fundamentals of Dielectric Breakdown Statistics
Summary and Future Trends
Dielectric Breakdown Of Gate Oxides: Physics And Experiments
Introduction
Physics of Degradation and Breakdown
Physical Models for Oxide Degradation and Breakdown
Experimental Results of Oxide Breakdown
Post-Breakdown Phenomena
Negative Bias Temperature Instabilities In Pmosfet Devices
Introduction
Considerations on NBTI Stress Configurations
Appropriate NBTI Stress Bias Dependence
Nature of the NBTI Damage
Impact of the NBTI Damage to Key pMOSFET Transistor Parameters
Physical Mechanisms Contributing to the NBTI Damage
Key Experimental Observations on the NBTI Damage
Nit Generation by ReactionDiffusion (RD) Processes
Hole Trapping Modeling
NBTI Dependence on CMOS Processes
NBTI Dependence on Area Scaling
Overview of Key NBTI Features
Hot Carriers
Introduction
Hot Carriers: Physical Generation and Injection Mechanisms
Hot Carrier Damage Mechanisms
HC Impact to MOSFET Characteristics
Hot Carrier Shift Models
Stress-Induced Voiding
Introduction
Theory and Model
Role of the Overlying Dielectric
Summary of Voiding in Al Metallizations
Stress Voiding in Cu Interconnects
Concluding Remarks
Electromigration
Introduction
Metallization Failure
Electromigration
General Approach to Electromigration Reliability
Thermal Considerations for Electromigration
Closing Remarks
Index
Table of Contents provided by Publisher. All Rights Reserved.

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Reliability Wearout Mechanisms in Advanced CMOS Technologies

Summary

Author Biography

Table of Contents

Supplemental Materials